A novel input transition aware dynamic voltage scaling based low power 8 bit Multiplier–Accumulator (MAC) architecture for Digital Signal Processing (DSP) has been presentedinthispaper.MACisoneofthemainmodulesusedinthevariousDSPapplications likefiltering,convolutionandsoon.Theproposedinputdatatransitionawaredynamicvoltage scalingisveryeffectivemethodtominimizethedynamicpowerconsumptionwithoutdegrading the performance of the system. The input data transition detector circuit in the proposed lowpowerMACdetectsthetransitionandappliesthedynamicvoltagescalingadaptivelyso that the dynamic power is reduced to greater extent. The dynamic power consumed by the conventional MAC is 662.59mW when all inputs are switching and it is only 475.75mW fortheproposedMACwiththesameconditions.TheproposedMACconsumes28.19%less power than the conventional MAC for the same set of inputs and simulation environment.

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• A novel input data transition aware dynamic voltage scaling based low power MAC architecture for DSP applications